A high-speed, programmable, CSD coefficient FIR filter

A new high-speed, programmable FIR filter is present, which is a multiplierless filter with CSD encoding coefficients. With this encoding scheme, the speed of filter is improved and the area is optimized. In order to make this filter more applicable, we employ a new programmable CSD encoding structure to make CSD coefficients programmable. In the end of this paper, we design a 10-bits, 18 taps video luminance filter with the filter structure we present. The completed filter core occupies 6.8×6.8 mm of silicon area in Wu-Xi Shanghua 0.6-μm 2P2M CMOS technology, and its maximum work frequency is 100MHz. Index TermsFinite Impulse Response filter, Application Specific Integrated Circuit, Canonic Signed-digit Encode, Booth Multiplier, Wallace Adder Tree.